Multi-processor systems employ two or more computer processors that can communicate with each other, such as over a bus or a general interconnect network. In such systems, each processor may have a memory cache (or cache store) that is separate from the main system memory. Each individual processor can access memory caches of other processors. Thus, cache memory connected to each processor of the computer system can often enable fast access to data. Caches can reduce latency associated with accessing data on cache hits and reduce the number of requests to system memory. In particular, a write-back cache enables a processor to write changes to data in the cache without simultaneously updating the contents of memory. Modified data can be written back to memory at a later time if necessary.
Coherency protocols have been developed to ensure that whenever a processor reads a memory location, the processor receives the correct or true data. Additionally, coherency protocols ensure that the system state remains deterministic by providing rules to enable only one processor to modify any part of the data at any given time. If proper coherency protocols are not implemented, however, inconsistent copies of data can be generated.
A network architecture can be implemented as an ordered network or an unordered network. An ordered network generally employs at least one ordered channel for communicating data between nodes in the network. The ordered channel is configured to help ensure that transactions issued to a common address are processed in order. Accordingly, when multiple requests for the same block of data are transmitted on an ordered channel, the network (e.g., switch fabric) communicates the requests in order. An unordered network does not employ a mechanism to maintain ordering of requests that are communicated in the network. As a result, different messages can travel along different paths through the unordered network can take different amounts of time to reach a given destination. Consequently, different requests or other message for the same data can arrive at an owner of the data in a different order from the order in which the requests were transmitted.